DocumentCode
1676844
Title
FFT-SPA non-binary LDPC decoding on GPU
Author
Andrade, J. ; Falcao, Gabriel ; Silva, Valter ; Kasai, Keisuke
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Coimbra, Coimbra, Portugal
fYear
2013
Firstpage
5099
Lastpage
5103
Abstract
It is well known that non-binary LDPC codes outperform the BER performance of binary LDPC codes for the same code length. The superior BER performance of non-binary codes comes at the expense of more complex decoding algorithms that demand higher computational power. In this paper, we propose parallel signal processing algorithms for performing the FFT-SPA and the corresponding decoding of non-binary LDPC codes over GF(q). The constraints imposed by the complex nature of associated subsystems and kernels, in particular the Check Nodes, present computational challenges regarding multicore systems. Experimental results obtained on GPU for a variety of GF(q) show throughputs in the order of 2 Mbps, which is far above from the minimum throughput required, for example, for real-time video applications that can benefit from such error correcting capabilities.
Keywords
decoding; error statistics; fast Fourier transforms; graphics processing units; parity check codes; signal processing; BER performance; FFT-SPA; FFT-SPA nonbinary LDPC decoding; GPU; binary LDPC codes; complex decoding algorithms; error correcting capabilities; fast-Fourier transform sum-product algorithm; multicore systems; nonbinary LDPC codes; nonbinary codes; parallel signal processing algorithms; real-time video applications; Complexity theory; Decoding; Engines; Graphics processing units; Kernel; Parity check codes; Throughput; Communications; Error correcting codes; GF(q); GPU; Non-binary LDPC codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech and Signal Processing (ICASSP), 2013 IEEE International Conference on
Conference_Location
Vancouver, BC
ISSN
1520-6149
Type
conf
DOI
10.1109/ICASSP.2013.6638633
Filename
6638633
Link To Document