Title :
A 150MHz-400MHz DLL-Based Programmable Clock Multiplier with -7OdBc Reference Spur in 0.18um CMOS
Author :
Maulik, Prabir C. ; Mercer, Douglas A.
Author_Institution :
Analog Devices, Wilmington, MA
Abstract :
This paper describes a DLL-based 150MHz-400MHz programmable clock multiplier which achieves lps-5ps RMS jitter and -70dBc reference spur level. The DLL uses a sampling phase detector and employs chopping, autozeroing and various other circuit techniques to reduce static phase offset and crosstalk between the reference and the output clock
Keywords :
clocks; crosstalk; phase detectors; timing jitter; 0.18 micron; 1 to 5 ps; 150 to 400 MHz; CMOS; DLL; autozeroing; chopping; crosstalk; programmable clock multiplier; reference spur level; sampling phase detector; static phase offset; Circuits; Clocks; Crosstalk; Detectors; Jitter; Phase detection; Phase measurement; Pulse measurements; Sampling methods; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.320972
