Implementation of an algorithm for heart rate measurement in a specialized multi-core processor

The article presents the method for implementation and results of examination of the Pan-Tompkins algorithm using a specialized 4-core Azurite processor, based on MIPS-II instruction set. The algorithm is used to determine heart rate on the basis of ECG signals. Azurite is a Multiprocessor System-on-Chip featuring an analog and a digital part. The digital part has been implemented in a Xilinx Virtex-6 FPGA system. An experimental study was carried out using one and three cores of Azurite processor as well as using the widely available microprocessor of the STM32F4 series (based on Cortex-M4F core). Same results were obtained for both types of cores. Division of the Pan-Tompkins algorithms into stages processed in 3 processor cores allowed for a 2.5 speedup of computations. Processing of a 27-second fragment of the ECG signal (sampling frequency of 250 Hz) using three cores of the Azurite processor (processor clock frequency of 100 MHz) took as little as 6.9 ms.