The use of condition maps in the design and testing of power electronic circuits and devices

This work presents a new technique for analyzing the conditions to which power semiconductor devices are subjected within practical inverters. A representative load cycle which defines the inverter conditions is used to estimate the switching conditions of the devices. Condition maps are generated, allowing the design and testing of the system to consider the more likely range of conditions. Estimates of temperature profiles can also be made to further improve the realism of such design. This promises to lead to the development of more realistic optimisation procedures.