DocumentCode
169090
Title
Design Space Exploration of Memory Model for Heterogeneous Computing
Author
Jieun Lim ; Hyesoon Kim
Author_Institution
Sch. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea
fYear
2014
fDate
22-24 Oct. 2014
Firstpage
160
Lastpage
167
Abstract
Heterogeneous computing that combines a traditional CPU architecture with an accelerator has become a popular architecture. Memory modelling design decisions affect not only architecture designs but also programming models. Hence, comparing them is very challenging and not all design spaces have been explored. Although a unified memory address space that is fully coherent and strongly consistent across the entire memory system would be the ideal case, because of scalability and complexity, less ideal designs have been proposed. In this paper, we explore various design options quantitatively and qualitatively. Our results suggest that maintaining a separate memory model for each architecture and having a partially shared memory space provide the most design options in both programming models and architecture designs.
Keywords
memory architecture; shared memory systems; storage allocation; CPU architecture; design space exploration; heterogeneous computing; memory modelling design; memory system; programming model; shared memory space; unified memory address space; Aerospace electronics; Computational modeling; Graphics processing units; Hardware; Memory management; Programming;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing (SBAC-PAD), 2014 IEEE 26th International Symposium on
Conference_Location
Jussieu
ISSN
1550-6533
Type
conf
DOI
10.1109/SBAC-PAD.2014.9
Filename
6970660
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