Analysis of limit cycle oscillations in digital current-mode control

The objective of this paper is to show that when a dc-dc converter employs digital current mode control limit cycle oscillations may occur due to quantization of inductor current. It is also shown that unlike digital voltage-mode control a few conditions will always exist when this problem can not simply be solved by adjustment of the resolution of the digital pulse width modulator (DPWM) with respect to the resolution of the analog to digital converter (ADC). The analysis of the limit cycle oscillations in the inductor current is presented by graphical means. It indicates that a closed-loop solution to the problem is possible, if the current reference is dynamically varied. The advantage of the proposed closed-loop solution is that it does not put any constraint on the resolutions of the ADC and the DPWM. Simulations and experimental results have been presented to validate the analysis.