DocumentCode :
1695516
Title :
Design and Study on a New BCH Coding and Interleaving Techniques Based on ARM Chip
Author :
Xie Zhi-yuan ; Li Na ; Li Le-le
Author_Institution :
Dept. of Electron. & Commun. Eng., North China Electr. Power Univ., Baoding
fYear :
2008
Firstpage :
315
Lastpage :
318
Abstract :
In order to improve the reliability of communication, the bit error rate is reduced by the scheme of Bose-Chaudhuri-Hocquenghem (BCH) coding and decoding integrated with interleaving. Based on the analysis of the traditional BCH coding and decoding algorithm, a fast method of BCH coding and decoding, which is suitable for advanced RISC machines (ARM) realization, is presented. After a reasonable interleaver has been chosen comparatively, the feasibility of this scheme is validated by MATALAB. Furthermore, the technique, combining BCH coding with interleaving are realized on ARM chip. The laboratorial result shows that the running speed is advanced and the reliability of data transmission is greatly improved.
Keywords :
BCH codes; block codes; channel coding; decoding; error statistics; interleaved codes; microprocessor chips; random codes; telecommunication network reliability; ARM chip; BCH coding; BCH decoding; Bose-Chaudhuri-Hocquenghem coding; advanced RISC machines; bit error rate; channel coding; communication reliability; interleaving coding; random block interleaver; Algorithm design and analysis; Bit error rate; Channel coding; Data communication; Decoding; Error correction; Interleaved codes; Redundancy; Software algorithms; Software design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems for Communications, 2008. ICCSC 2008. 4th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-1707-0
Electronic_ISBN :
978-1-4244-1708-7
Type :
conf
DOI :
10.1109/ICCSC.2008.73
Filename :
4536765
Link To Document :
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