Title :
NAND trees accurately diagnose board-level pin faults
Author :
Robinson, Gordon D.
Author_Institution :
GenRad Inc., Concord, MA, USA
Abstract :
The NAND tree structures used in some semiconductor test methods have been used in board test environments as a simple test for open input and bidirectional pins. The test methods used at semiconductor test time have an unfortunate problem when used at board test: they give an incorrect diagnosis. A new test procedure is described that avoids this problem
Keywords :
NAND circuits; logic testing; printed circuit testing; NAND trees; PCB testing; bidirectional pins; board test environments; board-level pin faults; open input; semiconductor test; test methods; Application specific integrated circuits; Artificial intelligence; DC generators; Fault detection; Fault diagnosis; Fixtures; Pattern analysis; Pins; Semiconductor device testing; Tree data structures;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.528028
