DocumentCode
170193
Title
Homogeneous many-core processor system test distribution and execution mechanism
Author
Kamran, Arezoo ; Navabi, Zainalabedin
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2014
fDate
26-30 May 2014
Firstpage
1
Lastpage
2
Abstract
In response to reliability challenges of new systems being built, we are proposing a scalable Self-Test architecture for many-core processor systems. This BIST architecture periodically distributes test stimuli among identical processing cores in a many-core processor system, suspends normal operation of individual processing cores, applies test, detects faulty cores, and removes them from the system if any are found faulty. Test is continuously performed without any perceptible down-time to the end-user, realizing a many-core processor system with self-healing capability.
Keywords
logic testing; multiprocessing systems; BIST architecture; homogeneous many-core processor system; processing cores; reliability challenges; scalable self-test architecture; test distribution mechanism; test execution mechanism; Built-in self-test; Computer architecture; Educational institutions; Fault diagnosis; Hardware; many-core; online testing; reconfiguration; reliability; test distribution;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2014 19th IEEE European
Conference_Location
Paderborn
Type
conf
DOI
10.1109/ETS.2014.6847839
Filename
6847839
Link To Document