DocumentCode
1702309
Title
An efficient address mapping method for the shared multi-port cache in RAID
Author
Yulin, Wang ; Guangjun, Li ; Shuisheng, Lin ; Xiaojun, Wu
Author_Institution
Inst. of Commun. Inf. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Volume
2
fYear
2005
Lastpage
807
Abstract
The multi-port cache is used in RAID to realize interface processors connecting in networks and to make RAID high band and give high expandability. To improve the performance of RAID, a good address mapping method is needed in the shared cache. In this paper, we propose a new method named the multilevel XOR mapping that considers well the characteristics of the logical address in the shared cache. The method can be realized in hardware and can efficiently reduce the conflicts of the ports and the index of the directory tables in theory. A simulation model is developed and the simulation results show the average access time of one block is reduced about 5% in normal workloads when compared with the full associativity mapping, and more than 10% in heavy workloads.
Keywords
RAID; cache storage; RAID; address mapping method; multilevel XOR mapping; performance; shared multi-port cache; Cache memory; Costs; Delay; Hardware; Information systems; Intelligent networks; Joining processes; Microprocessors; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN
0-7803-9015-6
Type
conf
DOI
10.1109/ICCCAS.2005.1495232
Filename
1495232
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