Parallel implementation of pyramidal classifier structures for high performance pattern recognition applications

The authors address a number of important issues related to the specification and implementation of high performance algorithms for pattern classification. In particular, performance is optimised by efficient implementation using a parallel processing computational infrastructure and the specification of techniques which allow the opportunity for an effective pattern rejection mechanism and a means for decision making at the earliest stage in the processing chain consistent with avoiding degradation of recognition performance. The techniques proposed are general purpose and may be applied to hierarchical pyramidal structures of any order