Design characterization of a 1.2V 900MHz CMOS current mode down-conversion mixer with filter

The design of a CMOS down-conversion mixer using current mode multiplication technique is characterized. For a mixer, the intermediate frequency f_IF at its output is the result of the multiplication of the RF input function and the oscillation (LO) function. For this design, the multiplication is carried out in current mode. This method is especially suitable for circuits with low voltage supply. The V_RF and V_LO voltages are first converted into the currents I_RF and I_LO, respectively, by using V-I converters before they are multiplied at the mixer stage. The operating voltage is at 1.2V. The intermediate frequency is 200 MHz. Three first order basic filters were cascaded to form the low pass filter that is necessary to filter out the sum of the RF and LO frequencies. The overall design has good linearity. This is shown by the values of its IP3 and P1dB which are 14dBm and 11.75dBm respectively. Since the biasing voltage is low, the power consumption of this down-conversion mixer with filter is only 62.67mW. Tanner S-edit was used to create the schematics to generate the SPICE file and Tanner T-Spice Pro v6.3 with transistor model 0.5μm CMOS technology was used for simulation.