Title :
Design of WBDSO control circuit with state machine
Author :
Zibin, Wang ; Changling, Chen
Author_Institution :
Sch. of Autom. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
In this paper, we describe a method for designing the sample control circuit of a wide-band digital storage oscilloscope (WBDSO) with state machine. This circuit can be started up by a startup signal and completes the data acquisition process automatically, driven by a clock signal. This circuit is designed with VHDL.
Keywords :
analogue-digital conversion; digital storage oscilloscopes; hardware description languages; signal sampling; VHDL; WBDSO control circuit; clock signal; data acquisition; sample control circuit; startup signal; state machine; wide-band digital storage oscilloscope; Application software; Automatic control; Buffer storage; Clocks; Counting circuits; Data acquisition; Process control; Signal processing; Storage automation; Switches;
Conference_Titel :
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN :
0-7803-9015-6
DOI :
10.1109/ICCCAS.2005.1495318
