A 12-bit, 50 MS/s SiGe BiCMOS sample-and-hold residue amplifier

A 3.3 V, fully differential, switched-capacitor, gain-of-2, SiGe BiCMOS, sample-and-hold amplifier (SHA) for use as a residue amplifier in a 1.5-bit per stage pipeline A/D converter is presented. The SHA is realized by using an operational transconductance amplifier (OTA) in a closed loop negative feedback system. The SiGe BiCMOS OTA has a simulated DC gain of 88 dB with a unity gain frequency (f_T) of 0.5 GHz at a phase margin of 65 degrees. The OTA has a differential output swing of 3 V and its differential input referred noise power spectral density (PSD) is 3.62 nV/√Hz. The SHA output settles to 0.01% accuracy in 9 ns, which allows realization of a 12-bit, 50 MS/s pipeline A/D converter (with an SNR ≈ 72.6 dB) even without digital self-calibration. High performance is obtained by optimal use of SiGe HBTs as cascodes. In earlier work, a pipeline A/D converter fabricated in the same technology achieved 12-bit performance at 34 MS/s. The IBM 6HP technology provides 47 GHz SiGe HBTs and 250 nm CMOS.