Research on quadrature transformation structures for SDR receiver

In this paper, some structures of digital quadrature transformation for software-defined radio (SDR) systems are studied. Their performance and effects on the SDR systems are also analyzed. Two generalized schemes for SDR receivers are proposed. One of them can reduce the A/D sampling speed by 2 times because of the quadrature A/D conversion structure; and the other can lower both the output data rate of every channel and A/D sampling speed by paralleling the digital quadrature filtering structure. These structures can be implemented into modules, and the polyphase filters can be flexibly realized by VHDL language based single-chip FPGA. At the same time, their applications to a particular SDR receiver system are introduced and analyzed. It is shown that these systems are reliable and feasible for module designing, and performance is improved for better performance price ratio.