Title :
A novel VDMOSFET structure with reduced gate charge
Author :
Chen, Wanjun ; Zhang, Bo ; Li, Zhaoji
Author_Institution :
Center of IC Design, Univ. of Electron. Sci. & Technol. of China, Sichuan, China
Abstract :
In this paper, a novel VDMOSFET structure, which realizes the small gate charge without significantly degrading specific on-resistance, is proposed. The new structure features the formation of the maximum removal gate electrode portion incorporating with the additional n-type implanted layer and the p-type implanted layer at the surface of the n-epitaxial layer. Reduction of the gate charge results in an improvement of switching performance. The gate charge density QGd and the figure of merit (FOM) of the new VDMOSFET are reduced by 62 percent and 56 percent compared with those of the conventional device, respectively.
Keywords :
power MOSFET; power convertors; switched mode power supplies; FOM; VDMOSFET structure; figure of merit; gate charge density; maximum removal gate electrode; n-epitaxial layer; n-type implanted layer; p-type implanted layer; reduced gate charge; switching performance; Costs; Degradation; Doping; Electric breakdown; Electrodes; MOSFETs; Power dissipation; Surface resistance; Switching converters; Switching frequency;
Conference_Titel :
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN :
0-7803-9015-6
DOI :
10.1109/ICCCAS.2005.1495366
