A scalable SDH/SONET framer architecture for datacom and telco applications

Author

Herkersdorf, A. ; Buchmann, P. ; Clauberg, R. ; Lemppenau, W. ; Schindler, H.R. ; Webb, D.

Author_Institution

Zurich Res. Lab, IBM Res. Div., Ruschlikon, Switzerland

fYear

2000

fDate

6/22/1905 12:00:00 AM

Firstpage

191

Lastpage

198

Abstract

This paper presents the architectural concepts behind a versatile VLSI device that maps ATM, IP, and/or traditional T1/T3 traffic streams into SONET/SDH transport signals ranging from OC-1 to OC-48/STM-16. Additional key features for effective system integration are on-chip support for add-drop multiplexing, digital cross-connect, and automatic protection switching functions. A roadmap discussing the applicability of the developed concepts for next-generation framers up to OC-192/STM-64 is also presented

Keywords

Internet; SONET; VLSI; asynchronous transfer mode; data communication; synchronous digital hierarchy; telecommunication traffic; transport protocols; ATM; IP traffic streams; OC-1; OC-192/STM-64; OC-48/STM-16; SDH; SONET; T1/T3 traffic streams; VLSI device; add-drop multiplexing; automatic protection switching; data communications; digital cross-connect function; next-generation framers; on-chip support; scalable framer architecture; system integration; transport signals; Asynchronous transfer mode; Local area networks; Next generation networking; Protection switching; SONET; Switches; Synchronous digital hierarchy; Telecommunication traffic; Very large scale integration; Wide area networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Broadband Communications, 2000. Proceedings. 2000 International Zurich Seminar on

Conference_Location

Zurich

Print_ISBN

0-7803-5977-1

Type

conf

DOI

10.1109/IZSBC.2000.829251

Filename

829251