Optimal data path widths for energy- and area-efficient Max-Log-MAP based LTE Turbo decoders

Data path widths in state-of-the-art Turbo decoder implementations depend on estimates for the upper bounds of the dynamic ranges of processed metrics. Aiming at highest area and energy efficiency, this paper presents guidelines for designing SISO and Turbo decoder data paths with minimal widths. This is based on least upper bounds for the dynamic ranges of internal metrics within the underlying Max-Log-MAP algorithm. Least upper bounds are presented for the LTE Turbo decoder. Furthermore, a new dynamic branch metric saturation scheme is presented in order to optimize the hardware utilization by proper adjusting the correlated upper state and branch metric bounds. In total, a data path width reduction of two bits is achieved applying radix-4 Max-Log-MAP arithmetic. An overall area-energy complexity reduction of 33% is achieved for the SISO decoder and of 28% for the LTE Turbo decoder.