• DocumentCode
    170658
  • Title

    I/O virtualization utilizing an efficient hardware system-level Memory Management Unit

  • Author

    Kornaros, George ; Harteros, Konstantinos ; Christoforakis, Ioannis ; Astrinaki, Maria

  • Author_Institution
    Dept. of Inf. Eng., Technol. Educ. Inst. of Crete, Heraklion, Greece
  • fYear
    2014
  • fDate
    28-29 Oct. 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We present the hardware architecture and extensions of an Input-Output Memory Management Unit (IOMMU) utilized in heterogeneous SoCs that support full virtualization. The proposed IOMMU architecture offers unique innovative features supporting multiple concurrently active virtual machine instances (VMs) with zero-latency world-context switching and enabling address translation services for up to a thousand virtual domains while serving multiple devices. At the same the proposed design allows for serving multiple address translation requests in parallel and per domain Translation Look-aside Buffer (TLB) invalidation.
  • Keywords
    memory architecture; storage management; virtual machines; virtualisation; I/O virtualization; IOMMU architecture; TLB invalidation; VM; address translation requests; address translation services; hardware architecture; hardware system-level memory management unit; heterogeneous SoC; input-output memory management unit; translation look-aside buffer; virtual domains; virtual machine instances; zero-latency world-context switching; Clocks; Context; Hardware; Out of order; Performance evaluation; Random access memory; Hardware Virtualization; I/O protection; IOMMU; TLB;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip (SoC), 2014 International Symposium on
  • Conference_Location
    Tampere
  • Type

    conf

  • DOI
    10.1109/ISSOC.2014.6972448
  • Filename
    6972448