DocumentCode :
17073
Title :
Low-Noise Switched-Capacitor Power Converter With Adaptive On-Chip Surge Suppression and Preemptive Timing Control
Author :
Chen Zheng ; Chowdhury, I. ; Dongsheng Ma
Author_Institution :
Univ. of Texas at Dallas, Richardson, TX, USA
Volume :
28
Issue :
11
fYear :
2013
fDate :
Nov. 2013
Firstpage :
5174
Lastpage :
5182
Abstract :
An integrated switched-capacitor (SC) power converter is presented in this paper, focusing on input current surge and switching noise suppression. By incorporating an adaptive on-chip surge suppression feedback loop, di/dt switching noise is significantly suppressed, and the start-up inrush current surge can also be greatly reduced. Furthermore, a preemptive timing control scheme is proposed to provide clock signals for each power switch with precisely controlled switching sequence and phase delays, contributing to further switching noise reduction. The proposed converter was fabricated with the AMIS 0.5-μm CMOS process. As the input varying from 2.7 to 4.2 V, the output voltage is regulated at 5 V, with a maximum load current of 25 mA. Compared to a conventional interleaved SC power converter, the proposed design demonstrates 74.7% and 80.9% reductions on the start-up inrush current surge and steady-state input current perturbation, respectively, and a 60.2% output switching noise reduction. The peak efficiency of 90.2% is measured at 2.7-V input and 100-mW load.
Keywords :
CMOS integrated circuits; switching convertors; AMIS CMOS process; SC power converter; adaptive on-chip surge suppression; adaptive on-chip surge suppression feedback loop; clock signals; current 25 mA; efficiency 90.2 percent; input current surge; integrated SC power converter; integrated switched-capacitor power converter; low-noise switched-capacitor power converter; output switching noise reduction; phase delays; power 100 mW; preemptive timing control scheme; size 0.5 mum; start-up inrush current surge; steady-state input current perturbation; switching noise suppression; voltage 2.7 V to 4.2 V; voltage 5 V; Discharges (electric); Logic gates; Noise; Surges; Switches; System-on-a-chip; Timing; Adaptive on-chip surge suppression; input current surge; interleaved switched-capacitor power converter (SCPC); preemptive timing (PT) control; switching noise;
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2013.2240015
Filename :
6415287
Link To Document :
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