Title :
A self-duty-cycled and synchronized UWB receiver SoC consuming 375pJ/b for −76.5dBm sensitivity at 2Mb/s
Author :
Vigraham, Baradwaj ; Kinget, Peter
Author_Institution :
Columbia Univ., New York, NY, USA
Abstract :
Novel highly networked applications with severe energy constraints such as tag and body-area networks, for ubiquitous object networking or the `Internet of Things´ are driving the need for ultra-low-power wireless data links that operate over a short range and with a relatively low data rate. Impulse radio UWB (IR-UWB) has shown unique promise for these applications; however, the synchronization and bit-level duty cycling of the receiver have remained a significant challenge. In this work, we present a fully bit-level-duty-cycled IR-UWB receiver SoC with a clock-and-data-recovery(CDR)-based synchronization for demodulation and self-duty cycling. The SoC contains the full receiver from RF signal in to clocked digital data bits out.
Keywords :
clock and data recovery circuits; demodulation; radio receivers; system-on-chip; ultra wideband communication; CDR; Internet of Things; RF signal; bit-level duty cycling; bit-level-duty-cycled IR-UWB receiver SoC; body-area network; clock-and-data-recovery-based synchronization; demodulation; energy constraint; impulse radio UWB; networked application; self-duty cycling; self-duty-cycled UWB receiver SoC; synchronized UWB receiver SoC; tag; ubiquitous object networking; ultra-low-power wireless data link; Baseband; Clocks; Demodulation; Radio frequency; Receivers; Synchronization; System-on-chip;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-4515-6
DOI :
10.1109/ISSCC.2013.6487807