DocumentCode :
1711790
Title :
Fast regulate motion estimation algorithm based on 9-PB search for H.264/AVC
Author :
Hsia, Shih-Chang ; Hong, Po-Yi
Author_Institution :
Dept. of Comput. & Commun. Eng., Nat. Kaohsiung First Univ. of Sci. & Technol., Kaohsiung, Taiwan
Volume :
1
fYear :
2010
Abstract :
This paper presents a fast algorithm implement the variable block size motion estimation for H.264 system. The fast algorithm is proposed based on hardware-oriented concept for regular VLSI design. We present a fast algorithm with 9-point block (9PB) concept to reduce the computational complexity. The vector is estimated with the continuous search to reduce the bandwidth of I/O memory. Also, variable block size motion estimation for 16×16, 16×8, 8×16, 8×8, 8×4, 4×8, 4×4 coding modes are computed simultaneously. Simulations show that our proposed algorithm can save 88%~94% motion searching time under H.264 program JM while PSNR only decreases about 0.02dB in average, from various sequences testing.
Keywords :
VLSI; computational complexity; motion estimation; video coding; 9-point block search; H.264 system; H.264/AVC; I/O memory; VLSI design; computational complexity; fast regulate motion estimation algorithm; hardware-oriented concept; Algorithm design and analysis; Bandwidth; Computer architecture; Encoding; Motion estimation; Pixel; Signal processing algorithms; H.264; inter-frame; motion estimation; variable block; video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (ICSPS), 2010 2nd International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-1-4244-6892-8
Electronic_ISBN :
978-1-4244-6893-5
Type :
conf
DOI :
10.1109/ICSPS.2010.5555387
Filename :
5555387
Link To Document :
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