• DocumentCode
    171237
  • Title

    A linear and efficient 1-bit digital transmitter with envelope delta-sigma modulation for 700MHz LTE

  • Author

    Tanio, M. ; Hori, Satoshi ; Hayakawa, Mana ; Tawa, N. ; Motoi, K. ; Kunihiro, K.

  • Author_Institution
    NEC Corp., Kawasaki, Japan
  • fYear
    2014
  • fDate
    1-6 June 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A highly linear and efficient 1-bit digital transmitter with envelope ΔΣ modulation (EDSM) is presented. Analyses and simulations reveal that the EDSM scheme is robust for distortion in output waveforms, and this has been experimentally verified using a CMOS EDSM IC and a GaN class-D PA for the 700-MHz band. The transmitter achieves an average ηD of 56.3% and an ACLR of -39 dBc for a 5-MHz BW and 6-dB PAPR LTE input without digital pre-distortion (DPD). Simple memoryless AM-PM correction is sufficient to improve ACLR to less than -45 dBc, indicating a lessening in required DPD.
  • Keywords
    CMOS integrated circuits; Long Term Evolution; delta-sigma modulation; radio transmitters; radiofrequency power amplifiers; wireless channels; ACLR; AM-PM correction; BW; CMOS EDSM IC; DPD; EDSM scheme; PAPR LTE; adjacent channel leakage power ratio; bandwidth 5 MHz; class-D PA; digital predistortion; envelope ΔΣ modulation; envelope delta-sigma modulation; frequency 700 MHz; linear digital transmitter; peak-to-average power ratio; power amplifier; waveform distortion; CMOS integrated circuits; Distortion measurement; Indexes; Modulation; Robustness; Switches; Transmitters; CMOS; delta-sigma modulation; digital pre-distortion; digital transmitter; switching-mode amplifier;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Symposium (IMS), 2014 IEEE MTT-S International
  • Conference_Location
    Tampa, FL
  • Type

    conf

  • DOI
    10.1109/MWSYM.2014.6848415
  • Filename
    6848415