Title :
Jitter reduction in SDH networks
Author :
Sari, H. ; Karam, G.
Author_Institution :
Societe Anonyme de Telecommun., Paris, France
Abstract :
After a brief review of pointer adjustment jitter in networks based on the synchronous digital hierarchy (SDH) and of previously proposed solutions, two new desynchronizer designs to reduce jitter are described. The first is a PLL-type desynchronizer obtained through an appropriate modification of a previously proposed scheme. The second avoids the generation of the random noise required in PLL-type desynchronizers. Using a design example, it is shown that this simple technique achieves good jitter performance in the normal mode of operation of the network, and that it can cope with large frequency offsets when the network is in degraded mode due to a loss of synchronism in one of its nodes
Keywords :
digital communication systems; synchronisation; telecommunication networks; PLL; SDH networks; desynchronizer designs; frequency offsets; jitter performance; jitter reduction; pointer adjustment jitter; synchronous digital hierarchy; Clocks; Frequency synchronization; Intelligent networks; Jitter; Noise generators; Payloads; Performance loss; SONET; Standardization; Synchronous digital hierarchy;
Conference_Titel :
Communications, 1991. ICC '91, Conference Record. IEEE International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-0006-8
DOI :
10.1109/ICC.1991.162237