DocumentCode
1716131
Title
A capacitor mismatch insensitive technique for RSD cyclic ADC
Author
Meng, Hao ; Paasio, Air ; Sun, Jia
Author_Institution
Turku Centre for Comput. Sci. (TUCS), Univ. of Turku, Turku, Finland
fYear
2011
Firstpage
504
Lastpage
507
Abstract
A new cyclic ADC structure achieving capacitor mismatch insensitivity is presented. This technique enables cyclic ADC to obtain a very precise residue voltage in cycles independent of matching of capacitors. In addition, this new structure saves the die area of capacitors in the switched capacitor network by 25% and significantly reduces power consumption by up to 40%. A 12-bit 1.67MS/s cyclic ADC using the new structure is implemented in 0.35μm CMOS.
Keywords
CMOS digital integrated circuits; analogue-digital conversion; CMOS; RSD cyclic ADC; capacitor mismatch insensitive technique; size 0.35 mum; switched capacitor network; word length 12 bit; Capacitors; Clocks; Computer architecture; Periodic structures; Power demand; Switches; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design (ECCTD), 2011 20th European Conference on
Conference_Location
Linkoping
Print_ISBN
978-1-4577-0617-2
Electronic_ISBN
978-1-4577-0616-5
Type
conf
DOI
10.1109/ECCTD.2011.6043399
Filename
6043399
Link To Document