Line and Point Tunneling in Scaled Si/SiGe Heterostructure TFETs

Author

Schmidt, Martin ; Schafer, Andreas ; Minamisawa, R.A. ; Buca, Dan ; Trellenkamp, Stefan ; Hartmann, J.-M. ; Qing-Tai Zhao ; Mantl, Siegfried

Author_Institution

Peter Grunberg Inst., Forschungszentrum Julich, Julich, Germany

Volume

35

Issue

7

fYear

2014

fDate

Jul-14

Firstpage

699

Lastpage

701

Abstract

In this letter, we systematically investigate the impact of gate length and channel orientation on the electrical performance of tunneling field-effect transistors (TFETs). We fabricate and characterize Si/SiGe heterostructure TFETs with p-doped compressively strained Si_0.5Ge_0.5 source, intrinsic Si channel, and n-doped Si drain. We observe a linear relation of gate length, L_g, and ON-current, I_ON, which is the first experimental proof of line tunneling occurring in a TFET. TCAD simulations support our observations. After forming gas annealing, short-channel TFETs exhibit different I-V characteristics compared with long-channel devices due to better passivation.

Keywords

Ge-Si alloys; elemental semiconductors; field effect transistors; silicon; tunnel transistors; I-V characteristics; Si-SiGe; channel orientation; electrical performance; gas annealing; gate length; intrinsic silicon channel; line tunneling; long-channel devices; n-doped silicon drain; p-doped compressively strained source; passivation; point tunneling; scaled heterostructure TFETs; short-channel TFETs; tunneling field-effect transistors; Logic gates; Photonic band gap; Silicon; Silicon germanium; Transistors; Tunneling; Tunneling field-effect transistors (TFETs); hetero-structure; line tunneling; line tunneling.; scaling; silicon-germanium (SiGe); strain;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2320273

Filename

6814298