DocumentCode :
1719269
Title :
Model Checking with "X" Value Based on PSL
Author :
Jian, Guo ; Jungang, Han ; Hongli, Yang ; Bo, Wang
Author_Institution :
Xidian Univ., Xidian
fYear :
2007
Abstract :
The foundation of hardware verification is that an implementation satisfies its specification. The specification described by a natural language may be ambiguous and inconsistence. The Acclellera Property Specification Language (PSL) is developed for the formal specification of hardware. It provides a standard means of specifying design properties using a concise syntax with clearly-defined formal semantics, particularly it offers an input method for dynamic (simulation) and static (formal verification method, such as model checking) verification tools. This paper proposes how to use model checking to verify a property with "X" value, and gives a model checking algorithm based on 3-valued (true, false, X) logic formula of PSL. This algorithm has the same time complexity as 2-valued logic model checking. Finally, we present how to separate CTL formula from a PSL verification unit, and verify these properties from PSL under the given model.
Keywords :
formal specification; formal verification; multivalued logic; specification languages; 2-valued logic model checking; Acclellera property specification language; PSL verification unit; dynamic simulation; formal hardware specification; formal semantics; hardware verification; natural language; static formal verification method; Digital circuits; Electronic design automation and methodology; Formal specifications; Hardware design languages; Instruments; Logic; Natural languages; Specification languages; System recovery; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Measurement and Instruments, 2007. ICEMI '07. 8th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4244-1136-8
Electronic_ISBN :
978-1-4244-1136-8
Type :
conf
DOI :
10.1109/ICEMI.2007.4350511
Filename :
4350511
Link To Document :
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