DocumentCode :
1720556
Title :
Saving memory in turbo-decoders using the max-log-MAP algorithm
Author :
Raouafi, F. ; Dingninou, A. ; Berro, Claude
Author_Institution :
Dept. d´´Electron., ENST de Bretagne, Brest, France
fYear :
1999
fDate :
6/21/1905 12:00:00 AM
Abstract :
The implementation of the MAP (or BCJR, APP…) algorithm requires a backup memory for the probabilities which can be of great size. In this paper, turbo decoding processes are defined which use little memory, while keeping good capacities of correction. The decoding processes were validated by simulation (C, VHDL). The structures presented offer the designer a panorama of technical solutions for implementing a turbo-decoder starting from the max-log-MAP algorithm
Keywords :
turbo codes; C; FPGA chip; VHDL; backup memory; error correction; max-log-MAP algorithm; memory saving; nonuniform interleaving; parallel concatenated codes; probabilities; recursive systematic convolutional codes; simulation; turbo decoding; turbo-decoders;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Turbo Codes in Digital Broadcasting - Could It Double Capacity? (Ref. No. 1999/165), IEE Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19990794
Filename :
829864
Link To Document :
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