Matched filter bank implementation on FPGA for a mutually orthogonal set of ZCZ codes using hadamard and ZCZ codes

Author

Matsumoto, Tad ; Nishikawa, T. ; Torii, Hideyuki ; Matsufuji, Shinya

Author_Institution

Grad. Sch. of Sci. & Eng., Yamaguchi Univ., Ube, Japan

fYear

2013

Firstpage

764

Lastpage

767

Abstract

In this paper, we propose a new structure for the compact matched filter bank of a mutually orthogonal set of zero-correlation zone (ZCZ) codes obtained by Hadamard and ZCZ codes which reduces the number of operation elements such as two-input adders and delay elements. The matched filter banks are implemented on a field programmable gate array (FPGA) with 57; 120 logic elements (LEs). A proposed matched filter bank of the sequence of length 128 can be constructed by the circuit scale of about 14 % compared with conventional matched filter bank.

Keywords

Hadamard codes; adders; correlation methods; delay circuits; field programmable gate arrays; matched filters; orthogonal codes; FPGA; Hadamard code; LE; ZCZ code; circuit scale; compact matched filter bank; delay element; field programmable gate array; logic element; mutually orthogonal set; operation elements; two-input adder; zero-correlation zone code; Correlation; Error correction; Error correction codes; Field programmable gate arrays; Logic gates; Hadamard code; field programmable gate array (FPGA); matched filter bank; mutually orthogonal set; zero-correlation zone (ZCZ) code;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Communication Technology (ICACT), 2013 15th International Conference on

Conference_Location

PyeongChang

ISSN

1738-9445

Print_ISBN

978-1-4673-3148-7

Type

conf

Filename

6488297