Title :
A multi-level-cell spin-transfer torque memory with series-stacked magnetotunnel junctions
Author :
Ishigaki, T. ; Kawahara, T. ; Takemura, R. ; Ono, K. ; Ito, K. ; Matsuoka, H. ; Ohno, H.
Author_Institution :
Central Res. Lab., Hitachi, Ltd., Kokubunji, Japan
Abstract :
We first report a multi-level-cell (MLC) spin-transfer torque memory (SPRAM) with series-connected magnetotunnel junctions (MTJs). The series MTJs (with different areas) show multi-level resistances by a combination of their magnetization directions. A four-level operation by spin-transfer-torque writing was experimentally demonstrated. A scheme for the write/read operation of the MLC SPRAM was also presented.
Keywords :
MRAM devices; magnetic tunnelling; magnetisation; SPRAM; magnetization directions; multilevel resistances; multilevel-cell spin-transfer torque memory; series-stacked magnetotunnel junctions; write/read operation; Computer architecture; Films; Magnetic tunneling; Microprocessors; Resistance; Tunneling magnetoresistance; MLC; MRAM; SPRAM; multi-bit; spin;
Conference_Titel :
VLSI Technology (VLSIT), 2010 Symposium on
Conference_Location :
Honolulu
Print_ISBN :
978-1-4244-5451-8
Electronic_ISBN :
978-1-4244-5450-1
DOI :
10.1109/VLSIT.2010.5556126
