DocumentCode :
1725850
Title :
ISPSD `07 Best Paper Award; Record-Low On-Resistance for 0.35 μm based Integrated XTREMOSTM Transistors
Author :
Moens, Peter ; Bauwens, Filip ; Desoete, Bart ; Baele, Joris ; Vershinin, Konstantin ; Ziad, Hocine ; Narayanan, E.M.Sankara ; Tack, Marnix
Author_Institution :
Member of the technical program committee of ISPSD, IRW, ESREF, ESD/EOS Symposium; chair of the HV reliability subcommittee of IRPS; technical program chair of ISPSD2009.
fYear :
2008
Abstract :
Experimental data are shown for integrated smart power transistors breaking the silicon limit at 100V. The performance is close to the much lower super-junction limit for the given device pitch. The device uses standard trench technology and is implemented in a 0.35 μm smart power process. Key steps to improve device performance yielding a record performance of 30 mOhm*mm2 for a Vbd of 94V are highlighted in the paper.
Keywords :
Awards;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1532-8
Type :
conf
DOI :
10.1109/ISPSD.2008.4538878
Filename :
4538878
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1725850
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