Title :
Processing of ultrathin 300 mm wafers with carrierless technology
Author :
Spiller, Sven ; Molina, Froilan ; Wolf, Jürgen M. ; Grafe, Jürgen ; Schenke, Andreas ; Toennies, Dietrich ; Hennemeyer, Marc ; Tabuchi, Tomotaka ; Auer, Hans
Author_Institution :
Doublecheck Semicond., Singapore, Singapore
Abstract :
We present a “carrierless” design for the manufacturing of ultrathin Silicon wafers, which are used in e.g. TSV (Through Silicon Via) and power chip applications. A carrierless wafer is a wafer which has a thinned inner portion, usually thinner than 150 μm, and a rim portion, which is stabilizing the wafer, so that the whole wafer can be handled without any additional support. In more detail, progress on 300 mm carrierless wafers and its compatibility with standard applications like RDL (Redistribution Layer) and bumping will be discussed.
Keywords :
integrated circuit design; integrated circuit manufacture; silicon; Si; carrierless technology; carrierless wafer; power chip applications; redistribution layer; rim portion; size 300 mm; through silicon via; ultrathin silicon wafers; Bonding; Copper; Electronic components; Resists; Silicon; Spinning; Through-silicon vias;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location :
Lake Buena Vista, FL
Print_ISBN :
978-1-61284-497-8
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2011.5898629
