Impact of floating the well contact on the low temperature kink in n-channel CMOS transistors

The effect of electrically floating the well on the low-temperature kink in n-channel CMOS transistors was investigated experimentally. I_d-V_d (drain current-drain voltage) curves at 13 K with the well grounded and with the well floating were obtained. The low-temperature kink in the I _d-V_d characteristics of n-channel CMOS transistors was found to be affected by the contact of the well. When the well contact is floated, only the first I_d- V_d trace displays a kink and hysteresis. Subsequent curves show little, if any, kink, but are consistent with the after-kink drain currents measured with the well contact grounded