Title :
A Power-Aware Test Methodology for Multi-Supply Multi-Voltage Designs
Author :
Chickermane, Vivek ; Gallagher, Patrick ; Sage, James ; Yuan, Paul ; Chakravadhanula, Krishna
Abstract :
This paper describes the challenges of testing low-power designs that use the commonly used multi-supply multi-voltage (MSMV) and power shut-off (PSO) design methodology. We describe a novel solution to address the manufacturing test of an MSMV/PSO design by using power-mode specifications to map multiple power modes to their target test modes and enhancing the DFT and ATPG methodology to enable a comprehensive test methodology. We provide experimental results and future directions for power-aware test.
Keywords :
automatic test pattern generation; design for testability; low-power electronics; power supply circuits; ATPG methodology; DFT; low-power designs; manufacturing test; multiple power modes; multisupply multivoltage designs; power shut-off design; power-aware test; power-mode specifications; Automatic test pattern generation; Automatic testing; Design for testability; Design methodology; Energy consumption; Job shop scheduling; Logic devices; Logic testing; Manufacturing; System testing;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700572
