Title :
Closed-form expressions for modeling metal fill effects in interconnects
Author :
Shilimkar, Vikas S. ; Gaskill, Steven G. ; Weisshaar, Andreas
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
Abstract :
This paper demonstrates efficient methods to account for parasitic capacitance and eddy-current loss in on-chip interconnects due to square metal fill. The parasitic capacitance extraction is based on an effective 3D to 2D reduction approach while the eddy-current loss in in-plane and out-of-plane metal fill is estimated by an empirical formula developed over a wide range of dimensions and frequencies. The interconnect capacitance matches with 3D electrostatic simulation and measurement within 2.1%. The additional parasitic resistance due to eddy-current loss in metal fill matches within 10% with 3D quasi-magnetostatic simulation results.
Keywords :
eddy current losses; integrated circuit interconnections; 3D electrostatic simulation; closed-form expression; eddy-current loss; interconnect capacitance; metal fill effects; on-chip interconnects; parasitic capacitance extraction; parasitic resistance; square metal fill; Resistance; Variable speed drives;
Conference_Titel :
Signal Propagation on Interconnects (SPI), 2011 15th IEEE Workshop on
Conference_Location :
Naples
Print_ISBN :
978-1-4577-0466-6
Electronic_ISBN :
978-1-4577-0465-9
DOI :
10.1109/SPI.2011.5898849
