Verification and validation procedures for embedded real time systems

Current research focused on verification and validation (V&V) methods for the analysis of systems advanced design approaches, such as parallel processing, multiprocessors, and distributed processing, is described. The result is the development and implementation of a set of procedures called the software engineering evaluation system (SEES). SEES is composed of a set of descriptive V&V procedures that are based upon state-of-the-practice methods and engineering principles that provide consistent and comparable system-to-system results. In addition, the V&V procedures generate metrics that provide a basis for self-correction of the process as it evolves toward the analysis of advanced designs