Title :
Serial concatenated trellis coded modulation with rate-1 inner code
Author :
Divsalar, D. ; Dolinar, S. ; Pollara, E.
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Abstract :
We develop new, low complexity turbo codes suitable for bandwidth and power limited systems, for very low bit and word error rate requirements. Motivated by the structure of previously discovered low complexity codes such as repeat-accumulate (RA) codes with low density parity check matrix, we extend the structure to high-level modulation such as 8PSK, and 16QAM. The structure consists of a simple 4-state convolutional or short block code as an outer code, and a rate-1, 2 or 4-state inner code. Two design criteria are proposed: the maximum likelihood design criterion, for short to moderate block sizes, and an iterative decoding design criterion for very long block sizes
Keywords :
block codes; computational complexity; concatenated codes; convolutional codes; iterative decoding; maximum likelihood decoding; phase shift keying; quadrature amplitude modulation; trellis coded modulation; turbo codes; 16QAM; 2-state inner code; 4-state convolutional code; 4-state inner code; 8PSK; bandwidth limited systems; high-level modulation; iterative decoding; low complexity codes; low complexity turbo codes; low density parity check matrix; maximum likelihood decoding; outer code; power limited systems; rate-1 inner code; repeat-accumulate codes; serial concatenated trellis coded modulation; short block code; very long block sizes; very low bit rate; very low word error rate; Bandwidth; Concatenated codes; Convolutional codes; Floors; Iterative decoding; Laboratories; Maximum likelihood decoding; Modulation coding; Propulsion; Turbo codes;
Conference_Titel :
Global Telecommunications Conference, 2000. GLOBECOM '00. IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-6451-1
DOI :
10.1109/GLOCOM.2000.891245