Very high-speed true random noise generator

Author

Cortigiani, Fabrizio ; Petri, Corrado ; Rocchi, Santina ; Vignoli, Valerio

Author_Institution

Dipt. di Ingegneria dell´´Inf., Siena Univ., Italy

Volume

1

fYear

2000

fDate

2000

Firstpage

120

Abstract

In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for random number generation is presented. The proposed circuit topology prevents the degradation of the generated-sequence statistical properties that can be caused by several factors, including the parameter spreading of the technological processes. Experimental results show that the circuit can issue delta-correlated 1-bit digital sequences with a generation maximum frequency above 12 MHz

Keywords

CMOS analogue integrated circuits; chaos generators; discrete time systems; high-speed integrated circuits; integrated circuit noise; noise generators; random noise; random number generation; sequences; 1 bit; 12 MHz; CMOS circuit topology; delta correlation; digital sequence; discrete time deterministic chaos algorithm; high-speed true random noise generator; random number generation; statistical properties; CMOS technology; Capacitors; Circuit topology; Degradation; Frequency; Noise generators; Random number generation; Sequences; Voltage; White noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on

Conference_Location

Jounieh

Print_ISBN

0-7803-6542-9

Type

conf

DOI

10.1109/ICECS.2000.911499

Filename

911499