Two floating resistor circuits and their applications to synaptic weights in analog neural networks

Author

Tantry, Shashidhav ; Yoneyama, Teru ; Asai, Hideki

Author_Institution

Dept. of Syst. Eng., Shizuoka Univ., Hamamatsu, Japan

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

564

Abstract

In this paper, we propose two floating resistor circuits as synaptic weights for the implementation of analog neural networks. One among them has positive resistance and other has negative resistance. The floating resistor with positive resistance has a wider resistance range. In the same way, the proposed floating resistor with negative resistance is characterized by multiple negative resistance values. Both of these circuits are realized with the intention of using the same circuit for more than one number of synaptic weights. To check the compatibility of these circuits, the limit cycle generator, a type of analog neural network, is simulated with the proposed floating resistors as synaptic weights

Keywords

CMOS analogue integrated circuits; active networks; negative resistance circuits; neural chips; analog neural networks; floating resistor circuits; limit cycle generator; multiple negative resistance values; negative resistance; positive resistance; synaptic weights; Artificial neural networks; Biological neural networks; Central nervous system; Circuit simulation; Intelligent networks; Limit-cycles; MOSFETs; Neural networks; Resistors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921918

Filename

921918