DocumentCode :
1745204
Title :
A low power MMSE receiver architecture for multi-carrier CDMA
Author :
McCormick, A.C. ; Grant, P.M. ; Thompson, J.S. ; Arslan, Tughrul ; Erdogan, Alper T.
Author_Institution :
Dept. of Electron. & Electr. Eng., Edinburgh Univ., UK
Volume :
4
fYear :
2001
fDate :
6-9 May 2001
Firstpage :
41
Abstract :
The power consumption of a minimum mean square error (MMSE) multi-carrier CDMA (code division multiple access) receiver implemented in digital hardware is considered. A new low power block based architecture is implemented for the combiner subsystem, and compared with a multiply accumulate circuit approach. Simulations using data consistent with typical performance of a multi-carrier CDMA receiver indicate that the block based approach can produce a power reduction of around 50%
Keywords :
code division multiple access; least mean squares methods; low-power electronics; radio receivers; combiner subsystem; digital hardware; low-power MMSE architecture; multi-carrier CDMA receiver; multiply accumulate circuit; numerical simulation; power consumption; Architecture; Energy consumption; Frequency domain analysis; Interference; Minimization; Multiaccess communication; Multiuser detection; OFDM; RAKE receivers; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.922164
Filename :
922164
Link To Document :
بازگشت