Exploring the cache design space for web servers

As Internet usage for e-commerce, communication and entertainment expands rapidly, careful attention needs to be paid to the design of Internet servers for achieving high performance and end-user satisfaction. In this paper we explore the access characteristics of front-end web workloads using SPECweb99 as the characteristic benchmark. In particular we explore the cache design space for single and dual-processor servers running the SPECweb99 benchmark. This includes studying the performance impact of cache size, line size and associativity for various levels of the cache hierarchy. We analyze SPECweb99 cache performance in terms of the misses per instruction, miss rate, instruction fetches vs. data reads and writes, coherence due to sharing across caches the rate at which writebacks occur, spatial and temporal locality, and other such properties. The results presented in this paper can be used as a guide for architects who make cache design choices for future processors and performance analysts who build web server models to predict future performance