Title :
Mismatch analysis and direct yield optimization by spec-wise linearization and feasibility-guided search
Author :
Schenkel, Frank ; Pronath, Michael ; Zizala, Stephan ; Schwencker, Robert ; Graeb, Helmut ; Antreich, Kurt
Author_Institution :
Inst. for Electron. Design Autom., Tech. Univ. Munchen, Germany
Abstract :
We present a new method for mismatch analysis and automatic yield optimization of analog integrated circuits with respect to global, local and operational tolerances. Effectiveness and efficiency of yield estimation and optimization are guaranteed by consideration of feasibility regions and by performance linearization at worst-case points. The proposed methods were successfully applied to two example circuits for an industrial fabrication process.
Keywords :
analogue integrated circuits; circuit optimisation; integrated circuit yield; linearisation techniques; tolerance analysis; analog integrated circuits; direct yield optimization; feasibility-guided search; global tolerances; industrial fabrication process; local tolerances; mismatch analysis; operational tolerances; performance linearization; spec-wise linearization; worst-case points; Circuit simulation; Design optimization; Electronic design automation and methodology; Fabrication; Integrated circuit yield; Optimization methods; Permission; Robustness; Threshold voltage; Yield estimation;
Conference_Titel :
Design Automation Conference, 2001. Proceedings
Print_ISBN :
1-58113-297-2
DOI :
10.1109/DAC.2001.156256
