Maximum throughput in multicast input queued packet switches

This work deals with multicast and variable length packet switching. An input queued architecture with one FIFO buffer for each input is considered; both unicast and multicast packet flows share the same queues. We propose a new scheduling algorithm that maximize the total throughput of the switch. By means of a simulation study the performances of the new algorithm are compared to those obtained using other previous known algorithms. The results show how the new algorithm improves the throughput performances with respect to the best known strategies. Moreover we present a modified version of the algorithm that is capable to guarantee both fairness and high throughput