An optimized processor for fast Reed-Solomon encoding and decoding

In this paper we present an optimized processor for fast Reed-Solomon encoding and decoding by using a configurable processor with parallel Galois Field multiplication and accumulation (GFMAC) units. With an optimized processor, maximum performance can be achieved for RS encoding/decoding over traditional implementations. Our implementation requires to add a small number of logical gates for customized GFMAC instructions and maintain a fewer number of registers. The processor is quite flexible and compact supporting different Reed-Solomon coding standards. Compared to hardwired RS encoder/decoder, our optimized processor is much general in terms of supporting software-programmable primitive polynomial, generator polynomial, symbol size, codeword length, the number of errors to be corrected as well as shortened RS codes.