DocumentCode
1753941
Title
Effective WIP flow estimation for daily fab production target setting with consideration of variability
Author
Kao, Yu-Ting ; Chang, Shi-Chung ; Luh, Peter B. ; Wang, Simon ; Chuang, Hsuan ; Chang, Joey
Author_Institution
Nat. Taiwan Univ., Taipei, Taiwan
fYear
2010
fDate
18-20 Oct. 2010
Firstpage
1
Lastpage
4
Abstract
This paper presents two innovative designs for including operation variability into an existing wafer flow estimation scheme SOPEA for the purpose of daily fab production target setting by processing stage and by product. Two types of fab operation variability are considered: (i) the machine allocation variability of individual stages caused by dynamic allocation of machines to individual stages, and (ii) the workload variability caused by the compound effect of uncertain processing time, initial WIP distribution and wafer start of the day under given machine allocation. An ON/OFF model with parameters fit to empirical data is proposed to capture the wafer flow slow down by machine allocation variability. Probabilistic queueing analysis is then performed to compensate the workload variability. The two methods have also been integrated with the DTS system in a memory fab case. With the consideration of machine allocation variability, SOPEA overestimation is reduced by 25% and 6% in average closer to actual daily flow-ins than the empirical rules.
Keywords
design engineering; probability; queueing theory; semiconductor device manufacture; ON/OFF model; daily fab production target setting; innovative design; machine allocation variability; penetration estimation algorithm stage; probabilistic queueing analysis; wafers-in-process flow estimation; Analytical models; Approximation methods; Lead;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing (ISSM), 2010 International Symposium on
Conference_Location
Tokyo
ISSN
1523-553X
Print_ISBN
978-1-4577-0392-8
Electronic_ISBN
1523-553X
Type
conf
Filename
5750210
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