Title :
A case for lifetime-aware task mapping in embedded chip multiprocessors
Author :
Hartman, Adam S. ; Thomas, Donald E. ; Meyer, Brett H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
Temperature-aware design is emerging as a popular approach to addressing a variety of challenges, including system lifetime. In the case of task mapping, temperature-aware approaches indeed improve lifetime due to lifetime´s strong dependence on tempera-ture. However, temperature-aware design neglects several important factors that also influence lifetime: (a) physical parameters such as supply voltage and current density, as well as (b) application and architecture characteristics that affect what failures are survivable. Only lifetime-aware task mapping can expose the relationship between physical parameters, component failure, and system lifetime, and therefore find lifetime-optimal mappings. To address this need, we have developed a new lifetime-aware task mapping technique based on ant colony optimization (ACO). Our technique produces task mappings resulting in lifetimes with-in 17.9% of the observed optimal results on average, outperform-ing a lifetime-agnostic task mapping approach by an average of 32.3%. We also observed that the lifetimes resulting from task mappings within 1% of the best maximum system temperature vary by an average of 20.1% while the lifetimes resulting from task mappings within 1% of the best average system temperature vary by an average of 32.6%. Our observations lead us to conclude that one cannot depend on temperature-aware task mapping when system lifetime is a design constraint, but one may depend on lifetime-aware task mapping when one or both of lifetime and temperature are design constraints.
Keywords :
integrated circuit reliability; microprocessor chips; optimisation; power aware computing; ant colony optimization; current density; embedded chip multiprocessors; lifetime-agnostic task mapping; lifetime-aware task mapping technique; lifetime-optimal mappings; supply voltage; system lifetime; task mapping; temperature-aware design; Equations; Failure analysis; Mathematical model; Optimization; Program processors; Temperature dependence; Temperature distribution; Task mapping; ant colony optimization; lifetime-aware; temperature-aware;
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2010 IEEE/ACM/IFIP International Conference on
Conference_Location :
Scottsdale, AZ
Print_ISBN :
978-1-6055-8905-3