Title :
Heap data management for limited local memory (LLM) multi-core processors
Author :
Bai, Ke ; Shrivastava, Aviral
Author_Institution :
Microarchitecture Lab., Arizona State Univ., Tempe, AZ, USA
Abstract :
This paper presents a scheme to manage heap data in the local memory present in each core of a limited local memory (LLM) multi-core processor. While it is possible to manage heap data semi-automatically using software cache, managing heap data of a core through software cache may require changing the code of the other threads. Cross thread modifications are difficult to code and debug, and only become more difficult as we scale the number of cores. We propose a semi-automatic, and scalable scheme for heap data management that hides this complexity in a library with a much natural programming interface. Furthermore, for embedded applications, where the maximum heap size can be known at compile time, we propose optimizations on the heap management to significantly improve the application performance. Experiments on several benchmarks of MiBench executing on the Sony Playstation 3 show that our scheme is easier to use, and if we know the maximum size of heap data, then our optimizations can improve application performance by an average of 14%.
Keywords :
cache storage; embedded systems; multiprocessing systems; optimisation; embedded systems; heap data management; limited local memory; multicore processor; natural programming interface; optimizations; software cache; Data structures; Instruction sets; Memory management; Multicore processing; Heap; IBM Cell; MPI; PS3; embedded systems; local memory; multi-core processor; scratch pad memory;
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2010 IEEE/ACM/IFIP International Conference on
Conference_Location :
Scottsdale, AZ
Print_ISBN :
978-1-6055-8905-3