• DocumentCode
    1756690
  • Title

    Predictive Modeling of Channel Potential in 3-D NAND Flash Memory

  • Author

    Yoon Kim ; Myounggon Kang

  • Author_Institution
    Memory Div., Samsung Electron. Co. Ltd., Hwaseong, South Korea
  • Volume
    61
  • Issue
    11
  • fYear
    2014
  • fDate
    Nov. 2014
  • Firstpage
    3901
  • Lastpage
    3904
  • Abstract
    For the first time, this brief analyzes the channel potential and capacitance in channel-stack type 3-D NAND flash memory structure. In addition, the effects of geometrical parameters on 3-D NAND flash design with gate-all-around and double-gate devices are studied. The model can be incorporated into a compact circuit model for 3-D NAND flash design optimization.
  • Keywords
    NAND circuits; flash memories; integrated circuit design; integrated circuit modelling; three-dimensional integrated circuits; 3D NAND flash design optimization; capacitance; channel potential; channel-stack type 3D NAND flash memory structure; circuit model; double-gate devices; geometrical parameter effect; predictive modeling; Ash; Capacitance; Electric potential; IEEE Potentials; Logic gates; Predictive models; Solid modeling; 3-D NAND flash memory; capacitance modeling; nanowire SONOS; stacked array;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2355918
  • Filename
    6913535
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1756690