Title :
Bi-Directional Trajectory Tracking With Variable Block-Size Motion Estimation for Frame Rate Up-Convertor
Author :
Gwo Giun Lee ; Chun-Fu Chen ; Ching-Jui Hsiao ; Jui-Che Wu
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
This paper presents bi-directional trajectory tracking with variable block-size motion estimation for frame rate up-conversion (FRUC) based on the algorithm/architecture co-exploration (AAC) design methodology. Due to concurrent exploration in both algorithm and architecture domains, the designed system requires fewer computations and lowers hardware cost, but is capable of enhancing the accuracy of motion vectors (MVs) by allowing MV refinement from coarse-grained to fine-grained. In addition, a method that uses multiple block candidates tracked by bi-directional MVs for interpolation is also presented to improve visual quality. Benefiting from AAC, we can extract architectural information at algorithmic design phase to determine the most feasible architecture; then, the proposed algorithm can be mapped onto target platform smoothly. The proposed FRUC system, which is capable of converting the frame rate from 60 fps up to 120 fps at full HD (1920 × 1080) resolution, was successfully implemented and verified on a field-programmable gate array. This FRUC system´s performance has not only been shown to surpass state-of-art alternatives in algorithmic performance, but its hardware cost is less than the comparable works described in the literature.
Keywords :
field programmable gate arrays; interpolation; motion estimation; AAC design methodology; FRUC system; MV refinement; algorithm domain; algorithm-architecture co-exploration design methodology; algorithmic design phase; architectural information; architecture domain; bi-directional MV; bidirectional trajectory tracking; coarse-grained refinement; concurrent exploration; field-programmable gate array; fine-grained refinement; frame rate up-convertor; interpolation; motion vector accuracy; multiple-block candidates; variable block-size motion estimation; visual quality; Algorithm design and analysis; Bidirectional control; Design methodology; Interpolation; Motion estimation; Tracking; Trajectory; Field-programmable gate array (FPGA); frame rate up-conversion (FRUC); motion-compensated interpolation; variable block-size motion estimation;
Journal_Title :
Emerging and Selected Topics in Circuits and Systems, IEEE Journal on
DOI :
10.1109/JETCAS.2014.2298923