Title :
High-throughput CABAC codec architecture for HEVC
Author :
Yongseok Choi ; Jongbum Choi
Author_Institution :
Multimedia R&D Team, DMC R&D Center, Suwon, South Korea
Abstract :
A VLSI architecture of a context adaptive binary arithmetic coding (CABAC) entropy codec for high-efficiency video coding (HEVC), the next generation video coding standard, is presented and analysis of its performance in terms of effective processing throughput, i.e. bin/s, is provided. For high throughput, the architecture is designed to process up to two regular bins per unit time while minimising pipeline stall due to inherent dependencies of CABAC through various optimisations including context forwarding and speculative decoding. The experiments show that the effective throughput is achieved up to 1.60 bins or 1.41 bits per cycle, which corresponds to 469.5 Mbit/s at the operating frequency of 333 MHz, under practical video coding environments.
Keywords :
VLSI; adaptive codes; arithmetic codes; binary codes; decoding; video codecs; video coding; HEVC; VLSI architecture; bit rate 469.5 Mbit/s; context forwarding; entropy codec; frequency 333 MHz; high-efficiency video coding; next generation video coding standard; speculative decoding;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2013.1811